Publications

Peer Reviewed Publication(s) with Proceedings

"Checking Architectural Outputs Instruction-By-Instruction on Acceleration Platforms" pdf icon
Debapriya Chatterjee (U of M), {Anatoly Koyfman, Ronny Morad, Avi Ziv} (IBM Research Lab, Haifa) and Valeria Bertacco (U of M)
Design Automation Conference (DAC), San Francisco, CA, June 2012

"SAGA: SystemC Acceleration on GPU Architectures" pdf icon
Sara Vinco (U of Verona), Debapriya Chatterjee (U of M), Valeria Bertacco (U of M) and Franco Fummi (U of Verona)
Design Automation Conference (DAC), San Francisco, CA, June 2012

"Approximating Checkers for Simulation Acceleration" pdf icon
{Biruk Mammo, Debapriya Chatterjee} (U of M), {Dmitry Pidan, Amir Nahir, Avi Ziv, Ronny Morad} (IBM Research Lab, Haifa) and Valeria Bertacco (U of M)
Design Automation and Test in Europe (DATE), Dresden, Germany, March 2012

"Simulation-based Signal Selection for State Restoration in Silicon Debug" pdf icon
Debapriya Chatterjee, Calvin McCarter and Valeria Bertacco
International Conference on Computer-Aided Design (ICCAD), San Jose, CA, November 2011

"EQUIPE: Parallel Equivalence Checking with GP-GPUs" pdf icon
Debapriya Chatterjee and Valeria Bertacco
International Conference on Computer Design (ICCD), Amsterdam, The Netherlands, October 2010

"Activity-Based Refinement for Abstraction-Guided Simulation" pdf icon
Debapriya Chatterjee and Valeria Bertacco
IEEE High-Level Design Validation and Test Workshop (HLDVT), San Francisco, CA, November 2009

"Event-Driven Gate-Level Simulation with GP-GPUs" pdf icon
Debapriya Chatterjee, Andrew DeOrio and Valeria Bertacco
Design Automation Conference (DAC), San Francisco, CA, July 2009

"GCS: High Performance Gate-Level Simulation with GP-GPUs" pdf icon
Debapriya Chatterjee, Andrew DeOrio and Valeria Bertacco
Design Automation and Test in Europe (DATE), Nice, France, April 2009

Journal Publication(s)

"Gate-Level Simulation with GPU Computing" link to the article
Debapriya Chatterjee, Andrew DeOrio and Valeria Bertacco
ACM Transactions on Design Automation of Electronic Systems (TODAES),Volume 16, Issue 3 June 2011, pages 30:1 - 30:26

"Study of the potential of alternative crops by integration of multisource data using a neuro-fuzzy technique" link to the article
Anjan Sarkar, Arka Majumdar, Shaunak Chatterjee, Debapriya Chatterjee, Shibendu S. Ray, B. Kartikeyan
International Journal of Remote Sensing(IJRS),Volume 29, Issue 19 October 2008, pages 5479 - 5493

Book Chapter(s)

"High Performance Gate-Level Simulation with GP-GPUs" link to the book's page at Morgan Kaufman
Debapriya Chatterjee, Andrew DeOrio, Valeria Bertacco
GPU Computing Gems,January 2011, Morgan Kaufman Publishers, ISBN: 9780123849885
Section 5, Chapter 23: High Performance Gate-Level Simulation with GP-GPUs, pages 343 - 364

Peer Reviewed Publication(s) without Proceedings

"Simulation-based Signal Selection for State Restoration in Silicon Debug"
Debapriya Chatterjee and Valeria Bertacco
International Workshop on Logic Synthesis (IWLS), UC San Diego, CA, June 2011

"EQUIPE: Parallel equivalence checking with GP-GPUs"
Debapriya Chatterjee and Valeria Bertacco
International Workshop on Logic Synthesis (IWLS), UC Irvine, CA, June 2010